In the previous volume (vol. 4), I talked about the start-up period of the semiconductor industry (until early 1970s). In this volume, I would like to focus on the present and talk about business aspects of cutting-edge processes.
Click below to read past volumes.
Volume 1 Semiconductor Miniaturization: What is Moore's Law?
Volume 2 Semiconductor Miniaturization and Manufacturing Process
Volume 3 Semiconductor Miniaturization and International Technology Roadmap
Volume 4 Semiconductor Miniaturization and Semiconductor Business
Volume 5 Semiconductor Miniaturization and Semiconductor Business (Part 2)
- State-of-the-art Miniaturization Costs a Lot. -
While the first single-chip LSI for calculators was launched in 1971 as I mentioned in the previous volume, semiconductor products that led to subsequent high integration and miniaturization were born at almost the same time, so let's talk about them first.
First, the previous year in 1970, Intel was the first company in the world to commercialize a dynamic random-access memory (DRAM), which is a major product of semiconductor memories. Intel aimed to commercialize semiconductor memory from the beginning of the company's establishment in 1968. At that time, large computers used magnetic core memories, and DRAM was successfully used to replace them as planned. The market of DRAM continued to expand, and the capacity of that became larger. Until about the 1980s, large computers drove semiconductor integration and miniaturization.
In 1971, the same year that the single-chip LSI for calculators was developed, Intel developed a microprocessor for calculators. Its adoption by IBM PCs in 1981 led to significant subsequent growth, known as the "Wintel Era." In 1985, Intel, which fell behind in DRAM competition and lost market share, withdrew from the DRAM market and concentrated its resources on microprocessors.
In the same 1971, Intel commercialized the world's first erasable programmable read-only memory (EPROM). A flash memory, which currently divides the semiconductor memory market into two parts with DRAM, was invented by a Japanese engineer and its origin comes from the EPROM. Please refer to the endnote (1).
Miniaturization requires new technology, which in turn needs new semiconductor manufacturing equipment (typical example is an exposure equipment discussed in the second volume). In the 1980s, the price of semiconductor manufacturing equipment was, according to my memory, around tens of millions of yen per unit at the highest (exposure systems may be over one hundred million). Eventually, hundreds of millions of yen became the usual price. Exposure systems in particular costs a lot; the price exceeds a billion yen as a norm. The most advanced EUV exposure systems are reported to cost a surprising ten billion yen or more. It is necessary to have many of them. It costs more than one hundred billion yen to build a single state-of-the-art factory. Looking at the latest news, we see figures as high as one trillion yen. This means that only companies with sufficient financial resources can afford state-of-the-art miniaturization.
State-of-the-art processes are becoming complex and long, which in turn increases cost. One example of complexity is multi-patterning, which I discussed in the lithography part of the second volume. Making masks, serving as the original circuit pattern for the product, also becomes more difficult and expensive. When our company (former Ricoh Electronic Devices) started using 0.13µm masks, a set of masks (more than 30 masks) cost tens of millions of yen or more (later they became cheaper). One set of masks can buy a house, and the most expensive single mask must have cost several million yen, a price that would buy a luxury car. With today's state-of-the-art processes, I imagine that a set of masks would probably be hundreds of millions of yen.
Not only the development and production of leading-edge processes, but also the development of products using the processes has become more expensive. We cannot compare it to the days of calculators (about 50 years ago), which I talked about in the last volume. The development cost is too high, and it only pays off if the product sells in large quantities or at a very high price.
Which semiconductor products are still pursuing high integration and miniaturization in 2023 using such expensive advanced processes?
A typical example of products that continue to pursue high integration is memory. Memory is constantly being enhanced to achieve high densities or, in other words, high integration. Typical products are DRAM and NAND flash memory (hereafter abbreviated as NAND flash). As a means of achieving high integration, miniaturization or the reduction of two-dimensional size was pursued first, but both products have already reached the limit of large capacity through the miniaturization of two-dimensional patterns, and three-dimensional structures are now in the process of being developed.
DRAM used to be called a technology driver and drove miniaturization technology. U.S. companies, such as Intel, which was the first to commercialize DRAM, and major Japanese electronics manufacturers also made DRAM, although they have already withdrawn from the market now. I think major companies (not including our company) made DRAM first, and then made other products after their manufacturing process matured to a certain degree. However, U.S. companies lost to Japanese companies, Japanese companies lost to Korean companies, and these companies withdrew from the DRAM market one after another. Please refer to endnote (2). The market has now become an oligopoly with the top three companies, two Korean and one U.S. memory specialized company, accounting for more than 90% of the market. As for the manufacturing process itself, the process for DRAM and the process for other products evolved in their own ways.
While DRAM is still being miniaturized at a very slow pace (please refer to endnote (3)), NAND flash has already reached the limit of integration through miniaturization several years ago. The direction of integration is shifting toward a vertical stacking of memory cells (called 3D NAND, which is like a single-story building turned into a skyscraper). Therefore, as an indicator of process technology, it is expressed in terms of the number of layers, such as XXX layers, rather than YY nm. The number of layers has already reached more than 100, but there is I suppose a limit because it is not possible to stack an infinite number of layers.
Other than memories, processors are pursuing higher integration and miniaturization. Memories pursue memory capacity, whereas processors pursue performance. In the first volume, I mentioned miniaturization as a means of achieving high integration. Miniaturization also has other advantages, such as higher speed and lower power consumption. Therefore, miniaturization will continue if it is possible to achieve higher speed and lower power consumption. Since miniaturization of two-dimensional patterns have reached its limit, various technologies were added to maintain the trend. However, these technologies could not sustain the trend, thus making the transistor structure three-dimensional. Regarding processors, processors for PCs used to be the typical product, but now processors for smartphones are much more popular in volume and the topic of people's conversations.
Other than these products, I think FPGAs are the only major products that are still pursuing cutting-edge miniaturization. FPGA stands for Field Programable Gate Array, which allows users to freely reconfigure logic circuits by software. For servers that are responsible for data processing in data centers, it seems to be very effective to combine FPGAs as well as processors. Intel acquired Altera, one of the two FPGA giants, in 2015, and AMD, Intel's rival, acquired Xilinx, another of the two FPGA giants, which may also be due in part to these situations.
I remember hearing (about 15 years ago, I think) that foundries used FPGAs as a product for starting up advanced processes, but especially in recent years, processors for smartphones have become the first products to use cutting-edge processes. Currently, the processors are distributed the most. At its peak, smartphones sold about 1.5 billion units per year, and even in 2020, they probably sold about 1.2 to 1.3 billion units per year. That is a tremendous volume.
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* Foundry: A company specializing in contract manufacturing of semiconductor wafer processes. It does not have its own brand products. |
By considering the above, it seems that products related to computing and data have always pursued cutting-edge processes. The amount of data is exploding exponentially. Intel recently uses the term "Data-Centric." It may be a world where processing more data, faster, and with lower power consumption must be pursued to take advantage of data.
As mentioned above, production using a cutting-edge process requires huge investment, and in addition, there are only a few products that require such process and can recover a huge investment. As a result, semiconductor manufacturers dropped out of the miniaturization race one after another or got out themselves. Except for the memory industry, TSMC, Samsung, and Intel are the only ones surviving in the race to develop leading-edge processes. Our company (former Ricoh Electronic Devices) left the miniaturization race more than 20 years ago.
Although three companies now lead a race that has been pushing forward to realize Moore's Law, it shows no sign of ending or stopping (despite being pointed out the limits of Moore's Law). When I was an active engineer working on process development, I wondered, "Why do we have to develop one advanced process after another? Why don't semiconductor companies talk to one another and decide to take a break?" But fortunately, or unfortunately, that did not happen.
This race may continue for some time with device structures changed, such as Fin-FETs and GAA (Gate All Around) structures (I do not describe details), which I could not imagine when I was working more than 20 years ago, and with back-end process technology (package technology) used in addition to wafer processes.
So far, I have used the words "semiconductor device" and "transistor" in my articles on miniaturization but have not explained them in detail. In the next volume, I would like to explain transistors as easily as possible so that even beginners can understand.
(1) EPROM, Erasable Programmable Read Only Memory.
A ROM that can be written and erased. In other words, it can be rewritten as many times as necessary (up to the upper limit of reliability). Writing can be performed electrically but erasing requires ultraviolet irradiation. A product that can also be erased electrically is called an EEPROM, with the "E" in electrically added to the beginning of EPROM. Flash memory works in principle as an EEPROM, and it is designed using various innovations to reduce bit costs with the aim of replacing magnetic memory. At erasing, each block is "instantaneously" erased all at once, hence flash memory was named after the image of a photographic flash.
(2) In Japan, the VLSI Technology Research Association, a four-year public-private partnership national project, was launched in 1976 to improve the performance of next-generation computers. The "VLSI" here is assumed to be a high-capacity DRAM, specifically a 1 Mbit DRAM. Although Japanese companies dominated the DRAM market in the 1980s and overtook the U.S. to take the top spot in semiconductor market share by country in the late 1980s, Japanese market share has continued to decline since the 1990s after they were defeated by Korean companies in the DRAM market.
(3) Cutting-edge processes for DRAM are in the 10 nm range. They are referred to as 1x, 1y, and 1z in order from the first generation in the 10 nm range. It is assumed that 1x is roughly 18 nm; 1y, 17 nm; 1z, 16 nm. The minimum dimension is slowly being miniaturized from 20 nm to 10 nm. It is said that 1z is followed by 1a (1α), 1b (1β), 1γ, and so on up to 1δ. In the volume 3, I mentioned that in the case of logic processes, there is a huge gap between the process name and the actual situation, but in the case of DRAM, the process name and the actual minimum dimensions seem to generally match.