As I described in "Volume 1 Semiconductor Miniaturization: What is Moore's Law?," the semiconductor industry first moved forward to realize Moore's Law by seeking miniaturization. Since miniaturization means making semiconductor devices smaller, I cannot skip mentioning how semiconductor devices are made. So, I will briefly explain how to make semiconductor devices.

Volume 2 Semiconductor Miniaturization and Manufacturing Process

Semiconductor Manufacturing Process

Semiconductor devices are fabricated in the surface of a silicon (Si) wafer, which is a disk of single-crystal Si with a thickness of about 0.5 mm to 1 mm. The manufacturing process for fabricating elements such as transistors and integrated circuits in the surface of a Si wafer is generally referred to as a wafer process or simply a process in the industry.

Since Si itself does not have special properties such as amplification, a certain approach is required to fabricate elements such as transistors in the surface of a Si wafer. This is impurity doping. One of the interesting properties of semiconductors is that their electrical properties can be changed by doping very small amounts of impurities. Additional impurities such as boron (B) or arsenic (As) to a Si wafer creates regions which have opposite electrical properties called p-type and n-type. By combining them properly, elements such as transistors are fabricated.

In addition, to attach electrodes to a device for input and output of external electrical signals and to connect multiple elements to form an electronic circuit (i.e., an integrated circuit), it is necessary to fabricate metal interconnections, such as aluminum (Al) and copper (Cu), on the surface of a Si wafer to flow electrical signals.

The figure below is a cross-sectional view of a certain semiconductor device. Semiconductor devices are generally made in region of a few µm to 10 µm above and below the surface of a Si wafer.

Processes to achieve what is described in this section can be categorized into three main types.

(1) Process to fabricate each element in a Si wafer, such as impurity doping, heat treatment, oxidation, etc.
(2) Process to alternately deposit conductive layers such as metal to create interconnections that conduct electrical signals and insulating layers to insulate the interconnections.
(3) Process to manufacture two-dimensional circuit patterns of elements and interconnections.

By combining (1) and (3), each element that constitutes an integrated circuit is built in a Si wafer, and by combining (2) and (3), integrated circuits are completed by connecting the elements with interconnections. The number of processes is estimated to be several hundred or more for the latest fine process.

A simple example of the process is shown below.

Process number from (1) to (3) in the figure corresponds to (1) to (3) described above.

First, a combination of (1) and (3) is used to fabricate an n-type region in a p-type Si surface.

High temperature referred to here is generally approximately in the range of 1000°C.

Next, a combination of (2) and (3) is used to make an electrode connected to an n-type region.

If an electrode is also connected to a p-type region, it becomes a diode.

Lithography - Key Processes for Miniaturization -

Miniaturization refers to the reduction of the size of the two-dimensional circuit pattern manufactured by the process (3) described above. The key process for manufacturing two-dimensional patterns is lithography. It is also called photolithography but is often referred to simply as lithography.

In the lithography processes, the exposure is the key process to miniaturization. By using a precision optical instrument (exposure equipment), a circuit pattern formed on the surface of a square glass plate called a photomask is transferred to a photosensitive material (called resist) coated on a wafer. Although few people may know this, a negative film of old film cameras corresponds to a photomask, and photographic paper corresponds to a wafer. While in this case the image is magnified, it is reduced in the case of semiconductor exposure process. Resolution limit, which refers to the width of lines and the space between lines an exposure device can achieve, is mainly determined by the wavelength of the light source used in exposure equipment.

In the example of a simple process described above, three photomasks are used since the process (3) is performed three times. In the case of integrated circuits, more than 10 photomasks are usually used even for a simple process, and more than 30 photomasks are used for a slightly more complex process.

Note that simply exposing the material with an exposure equipment only causes some chemical changes in the areas of the photosensitive material that are exposed to light; no pattern has yet been formed. To form a circuit pattern on a photosensitive material, it is necessary to remove the light-exposed areas of the photosensitive material after exposure by a chemical process called developing.

A conceptual diagram of the exposure process is shown below.

Actual lenses are a combination of several lenses, not one.

In the 1980s and 1990s, specific wavelengths emitted by mercury-arc lamp were the primary light source for exposure equipment. After using G-line (436 nm), I think I-line (365 nm) was used up to a minimum dimension of around 0.35 μm (350 nm). After that, 248nm of a KrF excimer laser and 193nm of an ArF excimer laser were used, and after a long development period, extreme-ultraviolet (EUV) 13.5 um lithography finally came into mass production in late 2018 to 2019.

Technology that exceeds the limits of light source wavelengths - Immersion lithography and multi-patterning -

The 193 nm of an ArF excimer laser was used until the emergence of EUV in mass production, and the formation of fine patterns that were much smaller than the wavelength of the light source was required. It was achieved by immersion lithography and multi-patterning.

Immersion lithography is exactly as the word implies: the space between lens and a wafer is filled with a liquid medium. The wavelength of light in a liquid is the wavelength in air divided by the refractive index of the liquid. When water is used as the liquid, the refractive index of water is 1.44, so the wavelength of 193 nm is reduced by 0.69 times to 134 nm, thus forming a pattern with smaller dimensions. A schematic diagram of immersion lithography is shown below.

Multi-patterning is exactly as the word implies and is a technique of patterning in several steps. There are several methods for multi-patterning, but I will describe the simplest method here. For example, in the case of double patterning, a pattern can be exposed in two separate exposures as shown in the figure below, allowing a wider pattern spacing in each exposure and forming a high-density pattern that is not possible with a single exposure. However, because the number of times to divide the process will increase both the number of photomasks and the processes, so the cost will increase, and the lead time will be longer. It can be said to be a cutting-edge technology from the viewpoint that patterns below the resolution limit can be formed. However, it can also be said to be a painful measure from the viewpoint that it is necessary to repeat many times to achieve what has conventionally been done only once.

Overview of the entire two-dimensional circuit patterning process

The lithography process described above is not a complete patterning process because it only forms a pattern on a photosensitive material. At the end of this topic, I will explain the entire two-dimensional circuit patterning process in a simple diagram.

First, a pattern of photosensitive material is formed in the lithography process, followed by the removal of insulating film, conductive film, and other areas not covered by the photosensitive material in a process called etching. Finally, the photosensitive material is also removed to complete the formation of a two-dimensional circuit pattern.

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